1. Field of the Invention
The present invention relates to data transmission devices, and more particularly, to low voltage differential signaling devices having desirable impedance and performance characteristics.
2. Description of the Related Art
Low Voltage Differential Signaling (LVDS) is a new technology aimed at high performance data transmission applications. LVDS technology features a low voltage differential signal of about 330 mV centered about a common-mode voltage of about 1.2V, compared to differential signals of about 0.6V-1.0V for PECL and about 2V-5V for RS-422 interfaces. With such low voltage swings, LVDS devices offer theoretical data rates in excess of 400 Mbps and relatively low power consumption (generally about 1.2 mW). In addition, LVDS allows for both DC and AC differences in ground reference voltage between the generator and receiver. This is accomplished by requiring the receiver to have a large input common mode range. Two key industry standards define LVDS: ANSI/TIA/EIA-644 and IEEE 1596.3.
Conventionally, LVDS drivers have been modeled as current mode devices, as illustrated in FIG. 1. As shown, the desired differential voltage Vdiff is achieved by causing a controlled current I to pass through termination resistor Rterm (typically about 100 xcexa9) at the receiver (via transmission lines having impedance ZT). Accordingly, the desired differential voltage Vdiff between the true and complement signal lines 102 and 104 is determined as the product of Rterm *I. Thus, given a known termination resistance Rterm, it is a matter of designing a circuit that will cause the correct current to flow through it and yield the desired voltage Vdiff. In most conventional LVDS drivers, this is done by adjusting the conductive bias on active current source devices such as FETs. Signaling is achieved by changing the polarity of the current I flowing through the termination resistor, and thus the polarity of Vdiff. Accordingly, much care has to be taken to properly design and implement biasing schemes.
In addition to required voltages to signal logic states, LVDS includes requirements concerning the xe2x80x9cnullxe2x80x9d logic state, or xe2x80x9ccommon-mode.xe2x80x9d For example, LVDS specifies that driver impedances Z1 and Z2 should be about the same, relatively constant and matched to the load, independent of the logic state, so that common-mode noise that propagates backward and reflects off the drivers does not get converted into differential noise by different reflection coefficients on the true and complement signal lines. Moreover, a xe2x80x9ccommon-modexe2x80x9d reference needs to be established and stably maintained.
Modeling LVDS drivers as current sources and sinks has many drawbacks and leads to many challenges.
For example, a current source and sink model, by itself, does nothing to set the common mode reference. Accordingly, as illustrated in FIG. 2, a reference voltage Vcm must be additionally provided with moderate impedance internal connections Rc1 and Rc2 thereto. The addition of Rc1 and Rc2 sets the common mode voltage and lowers the output impedance at the expense of increased power and complexity. If Rc1 and Rc2 are to provide perfect back termination (e.g. 100 ohms), then the current sources must provide twice the output current (i.e. doubling the power). Further, the demands on the voltage reference Vcm are not trivial, and cannot be integrated with the buffer without a prohibitive increase in power or area (for decoupling). Also, common mode testing requires that the Vcm supply both source and sink current. Therefore, Vcm cannot be generated without some degree of shunt regulation, thus wasting additional power. Lastly, this approach could not be used for bidirectional signaling since the Vcm supply would not allow input common mode to vary.
As another example, the common mode driver impedance according to the current source model becomes high and different than the driver impedance during signaling and as a result the common mode output voltage. So, as illustrated in FIG. 3, the prior art drivers typically add active feedback circuitry 302 to adjust the common mode voltage. However, this effectively lowers only the DC common mode driver impedance, at high frequency the delay in the circuit will result in reflections and additional artifacts.
Also, although adding such active devices can improve driver DC impedance, such a driver configuration is limited to point-to-point signaling. In other words, the transmission line associated with the driver can""t be adapted to do bidirectional signaling with this configuration. This is because the active feedback could not be used to set the input impedance.
Another problem with the conventional driver of the prior art approach is that the driver impedance is high and not matched to either the transmission lines or the parasitic inductors, such as L1 and L2 in FIG. 3. The high impedance output will cause reflections of single ended or differential noise when driving transmission lines longer than xc2xc wavelength of the highest frequency noise source. These reflections will then interfere with unrelated data at the receiver. When driving short transmission lines, the high output impedance will allow L1 and L2 to resonate with the output capacitance.
TMDS attempts to solve some of the above-described problems with conventional LVDS drivers. The TMDS approach is to try to control the input impedance of the driver. However, like FIG. 3, the TMDS driver has a high output impedance and thus has similar problems with respect to reflecting noise and damping parasitic impedance.
Accordingly, there remains a need in the art for a low-voltage differential I/O device and method the does not need voltage references to set common mode voltages and provides constant impedance in all logic states without the need for active feedback circuitry. The present invention fulfills this need, among others.
Accordingly, an object of the present invention is to effectively overcome the above-described problems of the prior art, among others.
Another object of the present invention is to provide a low voltage differential I/O device and method that does not rely on voltage references.
Another object of the present invention is to provide a low voltage differential I/O device and method that does not require active devices and feedback to set common mode voltages.
Another object of the present invention is to provide a low voltage differential I/O device and method that provides constant impedance for each logic state.
Another object of the present invention is to provide a low voltage differential I/O device and method that achieves higher signaling rates over conventional LVDS devices.
Another object of the present invention is to provide a low voltage differential I/O device and method that can detune output inductance.
To achieve these objects and others, a low voltage differential I/O device and method according to the invention is modeled using voltage sources and voltage dividers, rather than the current source and sink model of the prior art. In an exemplary implementation, a driver includes two pairs of transistors coupled between voltage sources, each pair associated with a respective logic state. Depending on the logic state to be signaled, one pair of transistors is driven strongly while the other pair is turned off. A differential voltage is established across the true and complement signal lines, the polarity of which is determined by the pair of transistors that is driven, and the magnitude of which is readily determined by voltage division of the voltage sources across known resistances. The driver of the invention offers stable and low impedance across both logic states and common mode. Moreover, active devices and feedback are not required to establish a common mode voltage or impedance as in the prior art.